Some progress in the symbolic verification of timed automata

M Bozga; Oded Maler; Amir Pnueli; S Yovine

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Some progress in the symbolic verification of timed automata

Conference paper

Peer reviewed

Some progress in the symbolic verification of timed automata

M Bozga, Oded Maler, Amir Pnueli and S Yovine

Computer Aided Verification, Vol.1254, pp.179-190

9th International Conference on Computer-Aided Verification, 9th (Israel, Haifa, 22/Jun/1997 - 25/Jun/1997)

1997

Abstract

In this paper we discuss the practical difficulty of analyzing the behavior of timed automata and report some results obtained using an experimental BDD-based extension of KRONOs, We have treated examples originating from timing analysis of asynchronous boolean networks and CMOS circuits with delay uncertainties and the results outperform those obtained by previous implementations of timed automata verification tools.

Details

Title: Some progress in the symbolic verification of timed automata
Creators: M Bozga (null)
Oded Maler (null) - The Weizmann Institute of Science
Amir Pnueli (null) - The Weizmann Institute of Science
S Yovine (null)
Resource Type: Conference paper
Publication Details: Computer Aided Verification, Vol.1254, pp.179-190; 1997
Number of pages: 12
Language: English
Conference: 9th International Conference on Computer-Aided Verification, 9th (Israel, Haifa, 22/Jun/1997 - 25/Jun/1997)
Scientific Unit: The Weizmann Institute of Science
Record Identifier: 993263370703596

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